1. Field of the Invention
The present invention relates to a switching device including a plurality of semiconductor switching elements coupled in series.
2. Description of the Related Art
Japanese Patent No. 2,754,411 (corresponding to U.S. Pat. No. 5,077,651) discloses a power converter as a switching device that includes a plurality of semiconductor elements coupled in series. As shown in FIG. 17, the power converter includes two transistors Tr1 and Tr2 coupled in series. A collector of the transistor Tr1 is coupled with a positive terminal of a direct current power source VDC. An emitter of the transistor Tr2 is coupled with a negative terminal of the direct current power source VDC. The power converter includes a snubber circuit. The snubber circuit restricts a surge voltage, which is generated due to a stray inductance L1 of a wiring when the transistors Tr1 and Tr2 are deactivated and is applied to the transistors Tr1 and Tr2. The snubber circuit includes zener diodes ZD1 and ZD2, charge-discharge snubber capacitors C1 and C2, and a clump snubber capacitor C3. The zener diode ZD1 and the charge-discharge snubber capacitor C1 are coupled in series, and the zener diode ZD1 and the charge-discharge snubber capacitor C1 are coupled in parallel with the transistor Tr1. The zener diode ZD2 and the charge-discharge snubber capacitor C2 are coupled in series, and the zener diode ZD2 and the charge-discharge snubber capacitor C2 are coupled in parallel with the transistor Tr2. One end of the clamp capacitor C3 is coupled with a series connecting point of the zener diode ZD1 and the charge-discharge capacitor C1 which are coupled with the transistor Tr1 on a high potential side. The other end of the clamp capacitor C3 is coupled with an emitter of the transistor Tr2 on a low potential side. Accordingly, a surge voltage applied to the transistors Tr1 and Tr2 can be restricted.
The transistors Tr1 and Tr2 respectively include free wheel diodes D1 and D2 that are coupled between the collector and the emitter in antiparallel. In each of the diodes D1 and D2, a reverse recovery current (or a recovery current) as a reverse current flows just after a reverse voltage is applied. Thus, when the transistor Tr1 on the high-potential side is activated, the recovery current of the free wheel diode D2 coupled with the transistor Tr2 on the low potential side flows to the transistor Tr1 on the high potential side. When the transistor Tr2 on the low-potential side is activated, the recovery current of the free wheel diode D1 coupled with the transistor Tr1 on the high potential side flows to the transistor Tr2 on the low potential side. Thus, at the transistors Tr1 and Tr2, power dissipation associated with the recovery current is generated.
Japanese Unexamined Patent Application Publication No. 10-262371 discloses a circuit that can restrict recovery current. As shown in FIG. 18, the circuit includes a saturable reactor L, a capacitor C, and a resistor R. The saturable reactor L is coupled in series with a diode D. The capacitor C and the resistor R are coupled in series. The capacitor C and the resistor R coupled in series are coupled in parallel with the diode D and the saturable reactor L coupled in series. Accordingly, a recovery current of the diode D can be absorbed and can be restricted.
When the circuit for restricting the recovery current is applied to the power converter, a circuit including a saturable reactor, a capacitor and a resistor is required for each free wheel diode. Thus, a structure becomes complex and a cost increases.